Do you support VHDL 2008?
We currently support a subset of the VHDL-2008 standard. Specifically, we support generate if/else, generate case, "all" in the sensitivity list, the "??" operator, unconstrained types, "case?", unary reduction operators, matching relational operators (e.g. "?="), expressions in port maps, reading output ports, extended conditional and selected assignment, enhanced bit string literals, package generics, block comments, external names and contexts.
Perhaps the most difficult part of providing VHDL-2008 support is finding open source VHDL-2008 code to test with. If you would like a particular feature or have example VHDL-2008 code you are willing to share, please raise an issue.
Why does VHDL-Tool reject my perfectly valid code?
It has been tested on all the open source VHDL code we can find. However, VHDL is a large and complex language and there are almost certainly things we got wrong. File a bug report.
Why don't you support editor X?
Probably because it does not support the Language Server Protocol. If your favourite editor does support the Language Server Protocol, and is not supported by VHDL-Tool, raise an issue.
Why should I use VHDL-Tool instead of some other VHDL editor?
Since VHDL-Tool uses the Language Server Protocol protocol to communicate with your editor, its features are available in all compatible editors. This includes editors like Vim and Emacs which, while extremely capable of text editing, do not traditionally support ide-like features. Say goodbye to Eclipse forever!
In addition to editor support, VHDL-Tool is very fast. Syntax checking, type checking and linting happen instantly. Autocompletions pop up immediately, and definitions are found without delay.
What does your feature road map look like?
We plan to add support for snippets and basic refactoring such as renaming variables/signals/ports across files. We also plan to incrementally add support for VHDL-2008.
Do you plan to support Windows?
Yes, in the near future.
Do you plan to support Verilog?